Metal organic chemical vapor depostion (MOCVD) tunnel junction growth in III-nitride devices

ABSTRACT

A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN&#39;s surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit under 35 U.S.C. Section 119(e) ofthe following commonly-assigned U.S. applications:

U.S. Provisional Patent Application No. 62/627,316, filed Feb. 7, 2018,by Abdullah Ibrahim Alhassan and Steven P DenBaars, entitled “DELTADOPING FOR MOCVD TUNNEL JUNCTION GROWTH IN III-NITRIDE DEVICES,”and

U.S. Provisional Patent Application No. 62/627,312, filed Feb. 7, 2018,by Abdullah Ibrahim Alhassan and Steven P DenBaars, entitled“REALIZATION OF MOCVD TUNNEL JUNCTION CONTACTS IN LARGE AREA III-NITRIDEDEVICES,”

both of which applications are incorporated by reference herein.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to a method of fabricating tunnel junctiondevices.

2. Description of the Related Art

III-nitride LEDs are a commercially proven technology and highefficiency industry LEDs have been demonstrated on a variety ofsubstrates. All commercial light emitting devices utilize traditionalp-contacts and materials other than p-GaN for current spreading, whichtypically comprise transparent conducting oxides (TCO), such as indiumtin oxide (ITO) or Zinc Oxide (ZO₂). Although these materials arestandard TCO for LEDs and widely used, they suffer from high opticallosses which limits the performance of III-nitride based optoelectronicsdevices. A tunnel junction is a diode comprising a very highly doped(n⁺/p⁺) interface that allows for electrons to tunnel between thevalence band and conduction band. N-type GaN (n-GaN) can be used as acurrent spreading layer on both sides of the device, eliminating theneed for a TCO layer or a silver (Ag) mirror. Improving the n⁺-GaN layerat the tunnel junction interface could improve the efficiency andreliability of III-nitride optoelectronics devices utilizing a tunneljunction. Since Metal Organic Chemical Vapor (MOCVD) tools are commonlyused in semiconductor processing on an industrial scale, this method offorming III-nitride tunnel junctions can be readily commercialized.

However, tunnel junctions grown by MOCVD are difficult to achievebecause the grown Mg-doped III-N layers are extremely resistive due tohydrogen passivation, and are typically activated by a post growthanneal. Additionally, it is hard to produce well defined junctions,because of a phenomenon known as the Mg memory effect and the moderaten-type layer doping.

What is needed then, are methods of improving the performance of tunneljunction performance. The present invention satisfies this need.

SUMMARY OF THE INVENTION

The present disclosure describes a structure for improving theperformance and reliability of III-nitride based tunnel junctionoptoelectronic devices.

In one example, after the growth of the LED structure, the p-GaN can beactivated either in situ or ex situ before or after the tunnel junctionregrowth. After that, an additional MOCVD growth is used to grow atunnel junction on large III-nitride devices. After etching a mesastructure in which one or more lateral dimensions are on the order of orlarger than 50 μm, any p-GaN that may be re-passivated by hydrogen atelevated temperatures can be reactivated by annealing through the sidewall or top surface through diffusion of hydrogen. By combining MOCVDgrown light emitters or absorbers and additional MOCVD deposited tunneljunction layer(s), the operating voltage of these devices can be reducedand their efficiency can be increased, and new types of devicestructures are enabled.

In another example, after the growth of the light emitting structure(e.g., light emitting diode (LED)), the p-GaN can be activated either insitu or ex situ before or after the tunnel junction regrowth. Afterthat, an additional MOCVD growth is used to grow a tunnel junction onlarge III-nitride devices using two methods. In a first method, aselective area tunnel junction regrowth is performed on p-GaN with adielectric pattern which will be etched later for post activation. Afteretching a mesa structure in which one or more lateral dimensions are onthe order of, or larger than, 50 μm, any p-GaN that may be re-passivatedby hydrogen at elevated temperatures can be reactivated by annealingthrough the side wall and top surface diffusion of hydrogen. In a secondmethod, a tunnel junction regrowth is performed by MOCVD so as to coverthe entire p-GaN surface. Then, a mesa is etched in the device, followedby etching small openings through the n-GaN tunnel junction to exposethe p-GaN, to allow for a complete p-GaN activation by annealing throughthe side wall and top surface diffusion of hydrogen. An exposed buriedp-GaN, even with small opening(s), leads to a full activation of p-GaNafter annealing.

By combining MOCVD grown light emitters or absorbers and an additionalMOCVD deposited tunnel junction layer, the operating voltage of thedevices could be reduced and their efficiency could be increased.Moreover, the present invention enables new types of device structures,including new types of light-emitting diodes (LEDs), power electronicsdevices, edge-emitting laser diodes (EELDs), and solar cells.

Embodiments of the present invention include, but are not limited to,the following.

1. A device, comprising a mesa including a III-nitride p-n junction, thep-n junction including an active region between a first p-type layer anda first n-type layer; a III-nitride region patterned on the III-nitridep-n junction, the III-nitride region including a second n-type layer, asecond p-type layer, and a tunnel junction formed at an interfacebetween the second n-type layer and the second p-type layer; and anarray of openings in the III-nitride region exposing the second p-typelayer on a top surface of the mesa; and wherein the mesa has one or morelateral dimensions that are larger than 50 micrometers (m).

2. The device of embodiment 1, wherein each of the openings have a widthW and 0.1 μm≤W≤100 μm.

3. The device of embodiment 1 or 2, wherein a spacing S between theopenings is 0.5 μm≤S≤400 μm.

4. The device of one or any combination of embodiments 1-3, furthercomprising a patterned dielectric on a top surface of the mesa, whereinthe patterned dielectric comprises the openings exposing the secondp-type layer.

5. The device of one or any combination of embodiments 1-4, wherein thefirst p-type layer, the second p-type layer, the first n-type layer, andthe second n-type layer comprise GaN.

6. The device of one or any combination of embodiments 1-5, wherein thesecond n-type layer comprises an n-type GaN layer having an n-typedopant concentration of at least 1.1E20 cm⁻³.

7. The device of one or any combination of embodiments 1-6, wherein theinterface has a surface roughness of 2.2 nanometers (nm) or less over anarea of 5 micrometers by 5 micrometers.

8. The device of one or any combination of embodiments 1-7, wherein acurrent density of at least 5 A/cm² flows in response to a voltage of2.5 V applied across the device between a first metal contact to thefirst n-type layer and a second metal contact to the second n-typelayer, and the device outputs light with a power of at least 0.5milliwatts (mW) in response to a current density of 2.25 A/cm² flowingbetween the first metal contact and the second metal contact.

9. A method for fabricating a III-nitride semiconductor device,comprising growing a III-nitride p-n junction with an active region andusing metal-organic chemical vapor deposition (MOCVD) or chemical vapordeposition, the III-nitride p-n junction including the active regionbetween a p-type layer and an n-type layer; and growing subsequentIII-nitride material including an n-type material using MOCVD orchemical vapor deposition, utilizing a pulsed delta n-type doping schemeto realize an abrupt, smoother surface of the n-type material and ahigher carrier concentration in the n-type material; and wherein thesubsequent III-nitride material forms a tunnel junction.

10. The method of embodiment 9, wherein a pulsed delta n-type dopingscheme is used at a regrowth interface with the p-n junction or for theentire growth of the subsequent III-nitride material including thetunnel junction.

11. The method of embodiments 9 or 10, wherein the pulsed delta n-typedoping scheme is achieved by injecting a precursor containing n-typedopant for 40 seconds or less per cycle and forms a continuous layergrowth by keeping the Group V and Group III precursors uninterrupted.

12. The method of one or any combination of embodiments 9-11, whereinthe pulsed delta n-type doping scheme is achieved by injectingprecursors containing n-type dopant and Group V/III materials for aperiod of time in cycles.

13. A method for fabricating a semiconductor device, comprising:

-   -   growing a III-nitride p-n junction with an active region using        metal-organic chemical vapor deposition (MOCVD) and/or chemical        vapor deposition (CVD), wherein the III-nitride p-n junction        includes a first p-type layer, a first n-type layer, and the        active region between the first n-type layer and the first        p-type layer; growing a subsequent III-nitride material        comprising a second p-type layer using MOCVD or chemical vapor        deposition (CVD); forming a mesa in the III-nitride p-n junction        and the subsequent III-nitride material, wherein the mesa has        one or more lateral dimensions that are larger than 50 μm; and        reactivating or activating a second p-type layer in the        subsequent III-nitride material through lateral and vertical        diffusion of hydrogen through the mesa's sidewalls and top        surface; and wherein the subsequent III-nitride material forms a        tunnel junction.

14. The method of embodiment 13, wherein the first n-type layer in thep-n junction and the active region are grown using the MOCVD, and thefirst p-type layer, the second p-type layer, and the tunnel junction aregrown using the CVD.

15. The method of embodiments 13 or 14, wherein delta-doping is used ata regrowth interface between the III-nitride p-n junction and thesubsequent III-nitride material.

16. The method of one or any combination of embodiments 13-15, whereinthe subsequent III-nitride material forms layers of the III-nitridematerial and a magnesium (Mg) concentration in the layers of theIII-nitride material is suppressed through exposure to an acid orthrough flow modulation epitaxy.

17. The method of one or any combination of embodiments 13-16, whereinthe reactivating or the activating activates Mg through the lateral andvertical diffusion of hydrogen through the sidewalls and the top surfaceat elevated temperatures above 800 degrees Celsius.

18. The method of one or any combination of embodiments 13-18, whereinthe activating or the reactivating through the top surface occursthrough openings that expose a surface of the second p-type layercomprising a p-type GaN layer.

19. The method of embodiment 18, wherein a width of the openings isbetween about 0.1 μm to about 100 μm wide and a spacing between each ofthe openings is about 0.5 μm to about 400 μm.

20. The method of embodiments 18 or 19, wherein the first p-type layerand the second p-type layer comprise p-GaN and the openings are formedbefore the subsequent III-nitride material including the tunnel junctionby first depositing a pattern of a dielectric on a surface of the firstp-GaN layer such that the subsequent III-nitride material occursselectively only on the exposed area of the first p-type layer.

21. One or any combination of embodiments 9-12 in combination with oneor any combination of embodiments 13-20.

22. The device of one or any combination of embodiments 1-8 fabricatedusing the method of one or any combination of embodiments 9-20.

BRIEF DESCRIPTION OF THE DRAWINGS

Referring now to the drawings in which like reference numbers representcorresponding parts throughout:

FIGS. 1A-1C show schematic diagrams of the various doping schemes, forcontinuous n-type doping (FIG. 1A), delta n-type doping by pulsing thedopant source during growth of a continuous layer (FIG. 1B), and deltan-type doping by pulsing the dopant source while pulsing III-N sources(FIG. 1C).

FIG. 2. Epitaxial structure grown by MOCVD for the Hall Effectmeasurements.

FIG. 3. Measured carrier concentration from Hall measurements for GaN:Silayers fabricated by varying the pulse doping time while maintaining thesame flow and growth rate.

FIGS. 4A-4B. Atomic force microscopy (AFM) images of a continuouslydoped GaN:Si layer (FIG. 4A) and a delta doped GaN:Si layer (FIG. 4B).

FIG. 5. is a schematic of an epitaxial structure for a MOCVD depositedtunnel junction grown on an MOCVD LED.

FIG. 6. The current voltage (I-V) measurement of tunnel junctioncompared to an ITO LED.

FIG. 7 is a flowchart illustrating a method of fabricating a deviceaccording to the first embodiment.

FIGS. 8A-8B. Cross-sectional schematics of device structures fabricatedusing method 1, showing after the deposition of MOCVD tunnel junction(FIG. 8A), and after etching the tunnel junction pattern to expose thep-GaN surface (FIG. 8B).

FIGS. 9A-9C. Cross-sectional schematics of device structures fabricatedusing method 2, showing deposition of a dielectric micro structure onthe p-GaN surface (FIG. 9A), a selective area regrowth of a tunneljunction by MOCVD (FIG. 9B), and LEDs utilizing a patterned tunneljunction (FIG. 9C).

FIGS. 10A-10B. Scanning Electron Microscope (SEM) images of thedielectric (SiO₂) pattern on the surface of the p-GaN at differentmagnifications.

FIGS. 11A-11B. SEM images of the selective area growth tunnel junctionat different magnifications.

FIG. 12. An image of a blue LED with dimensions of 450 μm by 270 μmlighting up with electrical current injection.

FIGS. 13A-13C. Electroluminescence measurement of the tunnel junctionLED, showing light-current (L-I) curves for LEDs subjected to areactivation anneal at 600° C. for 15 min (FIG. 13A), current-voltage(I-V) curves for the LEDs subjected to a reactivation anneal at 700° C.for 15 min (FIG. 13B) and L-I curves for the LEDs subjected to areactivation anneal at 700° C. for 15 min (FIG. 13C).

FIG. 14 is a flowchart illustrating a method of fabricating a deviceaccording to the second embodiment.

DETAILED DESCRIPTION OF THE INVENTION

In the following description of the preferred embodiment, reference ismade to the accompanying drawings which form a part hereof, and in whichis shown by way of illustration a specific embodiment in which theinvention may be practiced. It is to be understood that otherembodiments may be utilized and structural changes may be made withoutdeparting from the scope of the present invention.

Technical Description A. First Embodiment: Delta Doping for MOCVD TunnelJunction Growth in III-Nitride Devices

1. Introduction

Metal-organic chemical vapor deposition (MOCVD), also referred to asorganometallic vapor phase epitaxy (OMVPE) is a type of chemical vapordeposition (CVD) method used to form thin films of various materials andmicrostructures. This is achieved by flowing volatile organometallicgaseous precursors over a homoepitaxial or heteroepitaxial substrate atelevated temperatures, leading to the growth of high quality (e.g.,single) crystal films of various compound semiconductors.

N-type doping in III-nitride materials can be accomplished byincorporating atoms that act as electron donors, i.e. they have anenergy level that sits very close to the conduction band of the hostmaterial. To date, optoelectronic devices such as LEDs and LDs have beenfabricated with silicon (Si) semiconductor materials. However, heavy Sidoping leads to dislocation inclines, resulting in a buildup of tensilestress that can lead to morphological degradation. One strategy toimprove the highly doped n-type layer is performing a delta dopinginstead of continuous n-type doping.

Implementing delta n-type doping during the tunnel junction growth canreduce the surface roughness of the layer, leading to a uniform fieldacross the tunnel junction interface and uniform current injection.Additionally, optimizing the delta doping growth conditions can resultin higher doping as compared to continuous doping with the same carrierflows.

2. Example Doping Schemes

FIGS. 1A-1C are schematic diagrams illustrating the various dopingschemes, showing a continuous n-type doping during a continuous layergrowth (e.g., GaN) (FIG. 1A), delta n-type doping by pulsing the dopantsource (e.g., Si) during a continuous layer growth (FIG. 1B), and deltan-type doping by pulsing the dopant source during a pulsed depositionfrom pulsed III-N sources (FIG. 1C).

During the continuous n-type GaN:Si growth, a precursor containing Ga(trimethyl gallium [TMGa] or triethyl gallium [TEGa]), a precursorcontaining N (NH₃), and a precursor containing Si(silane or disilane)are injected into the reactor chamber at the same time. These precursorgasses are mixed with H₂ and/or N₂ carrier gas and directed to flow overthe substrate material, which is heated to between 500° C. and 1200° C.during growth. The concentration of Si in the GaN:Si film increases withan increasing molar flow ratio of Si to Ga. On the other hand, duringdelta doping (FIG. 1B), the precursor containing Si is injected for ashort time in a cycle. Lastly, in FIG. 1C, both the V/III sources andthe Si source are injected into the chamber for a short time in a cycle.

FIG. 2 shows an epitaxial structure grown by MOCVD used to characterizeGaN:Si layers electrically via Hall effect measurements. Hall Effectmeasurements were performed using indium contacts in a Van-der-Pauwgeometry.

FIGS. 3-6 illustrate results demonstrating working examples of thepresent invention.

FIG. 3 shows the measured carrier concentration from Hall measurementsfor delta doped GaN:Si layers as a function of the delta doping timewhile maintaining the same flow and growth rate. Si was introduced witha constant flow of both Si₂H₆ and TMGa or TEGa in order to achieve acontinuously doped layer. For example, a Si₂H₆ flow rate of 6 sccm witha TEGa flow rate of 12 resulted in carrier concentrations (assumed equalto Si concentrations due to low activation energy) around 1.06E20 cm³.Si can also be introduced via a pulsed flow of Si₂H₆, where the Gacontaining carrier gas flow remains uninterrupted. This pulsed dopingscheme allows the incorporation of high concentrations of Si whilemaintaining a smooth surface morphology. Alternating doped and undopedlayers (growing time while doping and growing time without doping in arange of 20 to 60 seconds) with an Si₂H₆ flow of 6 sccm and a continuousTEGa flow of 12 sccm for 60 nm total thickness resulted in a carrierconcentration ranging from 1.1E20 cm³ to 1.7E20 cm⁻³. All the pulsedGaN:Si layers exhibited higher carrier concentration as compared to whenusing continuous flow.

FIG. 4 shows an atomic force microscopy (AFM) image of a continuouslydoped GaN:Si layer (FIG. 4A), and a delta doped GaN:Si layer (FIG. 4B).Alternating 30 second doped and 30 second undoped layers with the samecarrier flows for 10 nm total thickness resulted in a higher carrierconcentration and smoother surfaces, which should result in betterelectrical characteristics for the tunnel junction formed using pulseddoped GaN:Si layers. The root-mean-squared (RMS) roughness was 2.2 nmand 5.3 nm for the samples grown with a pulsed GaN:Si layer and acontinuous GaN:Si layer, respectively.

FIG. 5 is a schematic of an epitaxial structure for a MOCVD depositedtunnel junction grown on an MOCVD LED. Delta doping was used to grow theheavily doped n-type layer to form a tunnel junction.

FIG. 6 illustrates the current voltage (I-V) measurement of the tunneljunction compared to an ITO LED with an activation condition of 700° C.for 15 min. At 20 A/cm², the difference between ITO and tunnel junctionLEDs is around only 0.4 V.

3. Process Steps

FIG. 7 is a flowchart illustrating a method for fabricating an(Al,Ga,In,B)N semiconductor device (referring also to FIG. 5).

Block 700 represents performing a growth of/growing a III-nitride p-njunction with an active region using metal-organic chemical vapordeposition (MOCVD) and/or chemical vapor deposition. The growth could beon homoepitaxial or heteroepitaxial substrate. The substrate used couldbe III-nitride native substrate such as GaN, AlN and InN or foreignsubstrate such as sapphire, silicon carbide and silicon. The III-nitridep-n junction includes the active region between a p-type layer and ann-type layer.

Block 702 represents performing a subsequent growth or regrowth 502 of(Al,Ga,In,B)N or III-nitride materials 502 using MOCVD, utilizing adelta (pulsed) n-type doping scheme to realize abrupt, smoother surfaceand higher carrier concertation n-type layer 500 (see FIG. 5). Examplesof dopants include, but are not limited to, silicon (Si) and germanium(Ge).

In one or more embodiments, the subsequent III-nitride material 502forms a tunnel junction.

In one or more embodiments, the subsequent regrowth ends with an n-typematerial 504 between about 1 nm to about 5000 nm thick.

In one or more embodiments, the subsequent regrowth includes n-type 500and p-type material 508, and the tunnel junction 510 is formed at aregrowth interface 506 of the n-type and p-type material.

In one or more embodiments, delta-doping is used at the regrowthinterface 506 or for the entire subsequent tunnel junction regrowth orentire growth of the subsequent III-nitride material 502 including thetunnel junction 510.

In one or more embodiments, the pulsed delta n-type doping scheme isachieved by injecting the precursor containing n-type dopant for a shorttime (e.g., 40 seconds or less) in cycles and forming continuous layergrowth by keeping the precursors comprising Group V and Group IIIprecursors uninterrupted.

In one or more embodiments, the delta doping scheme is achieved byinjecting both the precursors containing n-type dopant and V/IIIprecursors for a short time (e.g., 40 seconds or less) in cycles.

Block 704 represents the end result, a device such as, but not limitedto, a light emitting diode, a vertical cavity surface emitting laser,(VCSEL), a laser diode, a solar cell, or a photodetector.

In one or more embodiments, the device size has one or more lateraldimensions L that are larger than 5 μm.

The III-nitride materials can include various polarities of(Ga,Al,In,B)N, such as Ga-polar, N-polar, semi-polar or non-polar. Inparticular, N-face material may be obtained from N-polar or semi-polarGallium Nitride (GaN).

In one or more examples, only an n-type layer and the first activeregion are grown using MOCVD, and a p-type region and the tunneljunction are grown by a technique involving chemical vapor deposition.

4. Advantages and Improvements

Tunnel junctions are formed when semiconductor p-n junctions are dopedheavily enough such that carriers can tunnel between the conduction andvalence bands. Magnesium (Mg) is most suitable p-type dopant in theIII-N semiconductors and very high p-type doping can be achieved withoutdegrading the surface quality. However, there are issues with highlyn-doped layers as an n-type layer with concentrations above 10¹⁹ cm⁻³.Heavy n-type doping in III-N leads to dislocation inclines, resulting ina buildup of tensile stress that can lead to morphological degradation.This will limit the doping concentration in the n⁺-GaN at the tunneljunction interface, resulting in a reduced carrier tunneling efficiency.

As illustrated herein, the implementation of n-type (e.g., Si) deltadoping instead of continuously Si doping in the heavily n⁺-GaN layerallows for an improved surface morphology, leading to a uniform fieldacross the tunnel junction interface. Furthermore, higher Siconcentration can be achieved using delta Si doping compared tocontinuous doping with the same carrier flow rate. Lastly, increasingthe doping in the n-type layer reduces the barrier for interbandtunneling distance and reduce the forward voltage in the devices.

B. Second Embodiment: Realization of MOCVD Tunnel Junction Contacts inLarge Area III-Nitride Devices

1. Introduction

This section describes a regrowth method for large III-nitride (III-N)tunnel junction devices that uses MOCVD to grow light-emitting and/orlight-absorbing structures and MOCVD regrowth to grow tunnel junctions.

P-type GaN is a highly resistive material formed by doping GaN filmswith Mg.

Since MOCVD reactions take place at elevated temperatures in thepresence of hydrogen gas, charge carrying holes become compensated bythe presence of hydrogen-magnesium complexes. In order to activate theholes, these complexes must be dissociated through a high temperatureanneal [4]. In addition, carrier concentrations are only a few percentrelative to dopant concentrations due to the high activation energy ofMg relative to the valence band edge of III-nitrides. The relatively lowhole concentrations make forming low resistance ohmic contacts to p-GaNchallenging. N-type doped transparent conductive oxides (TCO) aretypically used to make contact to p-GaN. They form a tunnel junctioncontact to p-GaN and inject holes from the conduction band of the n-typematerial into the valence band of p-GaN. Homojunctions can also be usedto tunnel carriers into p-GaN. This has been successfully demonstratedthrough the use of Molecular Beam Epitaxy (MBE) regrowth of highly dopedn-GaN onto p-GaN [5]-[7].

MOCVD regrowth of n-type GaN is more of a challenge since the p-GaNsurface can become re-passivated by the presence of H₂ at elevatedtemperatures. Although some examples of in situ MOCVD grown tunneljunctions exist for LEDs [8], [9], their turn on voltage and seriesresistance are higher than those of their reference devices. This islikely due to issues with controlling the p⁺/n⁺ junction interface andissues activating the Mg in the p-GaN layer.

2. Example Tunnel Junction Regrowth Method

The present invention provides an entire MOCVD growth method for largeIII-N based tunnel junction devices where the tunnel junction can bepatterned during or after the growth. Two methods are disclosed to helprealize effective p-GaN activation, resulting in successful tunneljunction devices by MOCVD.

FIGS. 8A and 8B schematically show possible epitaxial structures, growthmethods and fabrication sequences according to a first method. In thedesign, the structure includes a substrate, followed by n-typelayers(s), light-emitting or absorbing layer(s), and p-type layer(s)grown by MOCVD, which are followed by an n-type tunnel junction layergrown by MOCVD. After etching the mesa structure in which one or morelateral dimensions are on the order of or larger than 50 μm (FIG. 8A), apattern having any shape and having a size of a few microns is etcheduntil the p-GaN surface is exposed. The pattern features could have anygeometric shape and could be separated with different spacings. A postgrowth anneal is performed to activate the buried p-GaN through thelateral and vertical diffusion of hydrogen.

In a second method, after the growth of the device structure (stopped atp-GaN), a pattern of a dielectric is deposited on the surface of thep-GaN, as shown in FIG. 9A. Then, a selective area regrowth of a tunneljunction by MOCVD is performed. After etching the mesa structure, a postanneal is carried out to activate the p-GaN through the lateral andvertical diffusion of hydrogen.

Both methods can lead to a fully activated p-GaN as well as realize atunnel junction by MOCVD for large area devices.

Thus, FIGS. 8A-8B and 9A-9C illustrate a device 800 (optoelectronicdevice, laser diode, Vertical Cavity Surface Emitting Laser (VCSEL),solar cell, photodetector, or LED) comprising a mesa 802, the mesaincluding a III-nitride p-n junction 804 and a III-nitride region 812patterned on the III-nitride p-n junction 804. The III-nitride p-njunction includes an active region 806 between a first p-type layer 808and a first n-type layer 810. The III-nitride region 812 includes asecond n-type layer 816, a second p-type layer 818 on the first p-typelayer 808, and a tunnel junction 820 formed at an interface 814, 814 abetween the second n-type layer 816 and the second p-type layer 818 orthe p-n junction. The device further comprises an array 822 of openings824 in the III-nitride region 812 exposing the second p-type layer 818.The mesa 802 has one or more lateral dimensions L that are larger than50 μm. Light is emitted through the openings in response to a voltageapplied between the first and second n-type regions.

In one or more examples, each of the openings 824 have a width W and 0.1μm≤W≤100 μm and/or a spacing S between the openings is 0.5 μm≤S≤400 μm.In one or more examples, the openings are distributed evenly across thetop surface T of the mesa.

FIG. 9A illustrates an example including a patterned dielectric 826 on atop surface 824 of the mesa, wherein the patterned dielectric comprisesthe openings 824 exposing the second p-type layer 818.

In one or more examples, the first p-type layer, the second p-typelayer, the first n-type layer, and the second n-type layer comprise GaN.

In one or more examples, the second n-type layer comprises an n-type GaNlayer having an n-type dopant concentration of at least 1.1E20 cm⁻³.

In one or more examples, the interface has a surface roughness of 2.2 nmor less over an area of 5 micrometers by 5 micrometers.

FIGS. 10A-10B, 11A-11B, 12, and 13A-13C illustrate results demonstratingworking examples of the present invention.

FIGS. 10A-10B show the dielectric pattern (SiO₂) on the p-GaN surface ofthe device (fabricated using method 2). The size of the dielectricpillars can be controlled by changing the mask design or choosingdifferent photolithography chemicals. FIGS. 11A-11B show the selectivearea regrowth of the tunnel junction by MOCVD. The SiO₂ can be etched byhydrofluoric acid (wet etch) or a dry etch.

FIG. 12 illustrates the current spreading ability of the patterned MOCVDdeposited tunnel junction grown on a MOCVD LED. All LEDs with patternedthe tunnel junction showed better light spreading and higher efficiencyas compared to a reference LED (a reference LED (ref LED) is a tunneljunction LED without a patterned tunnel junction).

FIG. 13A shows the light-current (L-I) characteristics of several tunneljunction LEDs with different patterns and reference LEDs. The activationconditions were at 600° C. for 15 minutes. FIGS. 13B and 13C illustratethe L-I and I-V measurement of several tunnel junction LEDs fabricatedusing an activation condition of 700° C. for 15 min. Increasing thetemperature improves the performance of the reference LEDs but hasalmost no effect on the tunnel junction LEDs with patterns. This meansthe pattern tunnel junction LEDs can be fully activated at lowertemperature due to the combination of the lateral and verticalactivation of the p-GaN.

3. Process Steps

FIG. 14 is a flowchart illustrating a method for fabricating an(Al,Ga,In,B)N semiconductor device (referring also to FIGS. 8A-B and9A-9C).

Block 1400 represents growth of a III-nitride p-n junction 804 with anactive region using metal-organic chemical vapor deposition (MOCVD). TheIII-nitride p-n junction includes a first p-type layer 808 (e.g.,gallium nitride, GaN), a first n-type layer 810 (e.g., GaN), and theactive region 806 (e.g., one or more III-nitride quantum wells QW)between the first n-type layer and the first p-type layer.

The growth direction could be any plane of the III-nitride crystal thatis polar, semipolar and nonpolar.

The growth could be on homoepitaxial or heteroepitaxial substrate. Thesubstrate used could be a III-nitride native substrate such as GaN, AlNand InN or foreign substrate such as sapphire, silicon carbide andsilicon.

Block 1402 represents performing a subsequent regrowth of (Al,Ga,In,B)Nmaterial or growing a subsequent III-nitride material 812 comprising asecond p-type layer 818 (e.g., p-type GaN) using MOCVD, and reactivatingMOCVD grown (Al,Ga,In,B)N material through lateral and verticaldiffusion of hydrogen through mesa sidewalls T2 and top surface T indevices 800 with one or more lateral dimensions L that are larger than50 μm.

In one or more embodiments, the subsequent regrowth 812 forms a tunneljunction 820.

In one or more embodiments, only the first n-type layer 810 in the p-njunction and the active region 806 are grown using MOCVD, and the firstp-type layer 808, the second p-type layer 818 and the tunnel junctionare grown by the technique involving chemical vapor deposition.

In one or more embodiments, the subsequent regrowth is of highly dopedp-type material to reduce contact resistance.

In one or more embodiments, the subsequent regrowth ends with an n-typematerial between about 1 nm to about 5000 nm thick.

In one or more embodiments, the subsequent regrowth includes n-type andp-type material, and the tunnel junction 820 is formed at a regrowthinterface 814 a of the n-type and p-type material.

In one or more embodiments, delta-doping is used at the regrowthinterface 814 a between the p-n junction and the subsequent III-nitridematerial 812.

In one or more embodiments, the subsequent regrowth is performed usinggroup III element metalorganic vapor precursors.

In one or more embodiments, the subsequent regrowth is performed usingvapor phase Si or Ge precursors.

In one or more embodiments, the subsequent III-nitride material formslayers of III-nitride material 812 and the magnesium (Mg) concentrationin the layers of the III-nitride material are suppressed throughexposure to an acid or through flow modulation epitaxy.

The step of Block 1402 can further comprise forming the mesa 802 in theIII-nitride p-n junction 804 and the subsequent III-nitride material812, wherein the mesa has one or more lateral dimensions L that arelarger than 50 μm; and reactivating or activating a second p-type layer818 in the subsequent III-nitride material through lateral and verticaldiffusion of hydrogen through the mesa's sidewalls T2 and top surface T.

In one or more embodiments, the reactivating or activating activates Mgthrough a lateral and vertical diffusion of hydrogen through thesidewalls T2 and top surface T of a mesa structure at elevatedtemperatures (e.g., above 800 degrees Celsius).

In one or more embodiments, the reactivating/activating is through thetop surface and can occur through small openings that expose a surfaceof the second p-type layer 818 (e.g., comprising the p-GaN). The smallopening can be formed before (method 1) or after (method 2) the tunneljunction subsequent regrowth. In one or more examples, the opening sizeis between about 0.1 μm to about 100 μm wide and a spacing between eachof the openings is about 0.5 μm to about 400 μm. The small openings canbe formed before the tunnel junction regrowth or subsequent growth ofIII-nitride material 812 by depositing first a pattern P of a dielectric826 on a surface 860 of the first p-type layer 808 (e.g., p-GaN surface)such that the subsequent growth 812 will occur selectively on theexposed area A of the first p-type layer 808 (e.g., p-GaN surface) only.

The dielectric could be silicon dioxide SiO₂, silicon nitride SiN_(x),or titanium nitride, for example.

The dielectric could be deposited by Ion bean deposition tool (IBD),plasma-enhanced chemical vapor deposition (PECVD), using sputteringtools, or by thermal evaporation, for example.

In one or more examples, the spacing between each opening is betweenabout 0.5 μm to about 400 μm. The opening shape could be any geometricshape, and the pattern of the openings can be any geometric shape.

The openings can be formed after the subsequent tunnel junction regrowthsuch that a dry etch or wet etch will be used to create openings.

Block 1404 represents further processing steps (e.g, metal contactformation) as required to form a device 800 (e.g., as illustrated inFIGS. 8A-8B and 9A-9C) including but not limited to, a light emittingdiode, laser diode, or a light absorber such as a solar cell orphotodetector. In one or more embodiments, the device is alight-emitting diode (LED), and sheet resistance on both sides of theLED's p-n junction is matched to reduce current crowding.

In one or more examples, a single metal contact deposition is used tofabricate contacts to both n-type layers of the device.

In one or more examples, the method of embodiments 1 and 2 can becombined. In one or more examples, the delta doping and pattern ofIII-nitride regions can be such that a current density of at least 5A/cm² flows in response to a voltage of 2.5 V applied across the devicebetween a first metal contact to the first n-type layer and a secondmetal contact to the second n-type layer (FIG. 5), and the deviceoutputs light with a power of at least 0.5 mW in response to a currentdensity of 2.25 A/cm² flowing between the first metal contact and thesecond metal contact (FIG. 13C).

4. Advantages and Improvements

The present disclosure reports on the unexpected and surprisingdiscovery that once the mesa structure is defined including a patternedtunnel junction layer on top of p-GaN, the p-GaN can be fully activatedwhile being buried beneath the n-GaN using the exposed mesa sidewallsand the exposed top surface from the pattern mask. Effectivere-activation of the p-GaN films in large devices can occur using themesa sidewalls and the exposed p-GaN top surface formed using thepatterned tunnel junction. In other MOCVD tunnel junction devicedesigns, the re-activation process of the p-GaN can only occur from theexposed sidewalls, which makes the re-activation very inefficient forlarge size devices. If the lateral dimensions of the device are largerthan the diffusion length of hydrogen when it is released from the H—Mgcomplex during the reactivation anneal, large area devices cannot befully activated from the sidewall only.

C. Nomenclature

This invention relates to III-nitride optoelectronic devices with tunneljunction n-type doped layers. The term “III-nitrides” or “III-N” refersto any alloy composition of the (Ga,Al,In,B)N semiconductors having theformula Ga_(w)Al_(x)In_(y)B_(z)N where 0≤w≤1, 0≤x≤1, 0≤y≤1, 0≤z≤1, andw+x+y+z=1. Optoelectronic devices include, but are not limited to,light-emitting diodes (LEDs), vertical cavity surface emitting lasers(VCSELs), edge-emitting laser diodes (EELDs), and solar cells.Furthermore, III-nitride materials can include various polarities of(Ga,Al,In,B)N, such as Ga-polar, N-polar, semi-polar or non-polar. Inparticular, N-face material may be obtained from N-polar or semi-polarGallium Nitride (GaN).

The term “nonpolar” includes the {11-20} planes, known collectively asa-planes, and the {10-10} planes, known collectively as m-planes. Suchplanes contain equal numbers of Group-III and Nitrogen atoms per planeand are charge-neutral. Subsequent nonpolar layers are equivalent to oneanother, so the bulk crystal will not be polarized along the growthdirection.

The term “semipolar” can be used to refer to any plane that cannot beclassified as c-plane, a-plane, or m-plane. In crystallographic terms, asemipolar plane would be any plane that has at least two nonzero h, i,or k Miller indices and a nonzero 1 Miller index. Subsequent semipolarlayers are equivalent to one another, so the crystal will have reducedpolarization along the growth direction.

REFERENCES

The following references are incorporated by reference herein.

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Conclusion

This concludes the description of the preferred embodiment of thepresent invention. The foregoing description of one or more embodimentsof the invention has been presented for the purposes of illustration anddescription. It is not intended to be exhaustive or to limit theinvention to the precise form disclosed. Many modifications andvariations are possible in light of the above teaching. It is intendedthat the scope of the invention be limited not by this detaileddescription, but rather by the claims appended hereto.

What is claimed is:
 1. A method for fabricating a semiconductor device,comprising: growing a III-nitride p-n junction with an active regionusing metal-organic chemical vapor deposition (MOCVD) and/or chemicalvapor deposition (CVD), wherein the III-nitride p-n junction includes afirst p-type layer, a first n-type layer, and the active region betweenthe first n-type layer and the first p-type layer; growing a subsequentIII-nitride material comprising a second p-type layer and a secondn-type layer using MOCVD or CVD; forming a mesa in the III-nitride p-njunction and the subsequent III-nitride material, wherein the mesa hasone or more lateral dimensions that are larger than 5 μm; patterning anarray of openings in the subsequent III-nitride material exposing thesecond p-type layer on a top surface of the mesa; reactivating oractivating a second p-type layer in the subsequent III-nitride materialthrough lateral and vertical diffusion of hydrogen through the mesa'ssidewalls and top surface; and forming a first metal contact to thefirst n-type layer and a second metal contact to the second n-typelayer, wherein: the subsequent III-nitride material forms a tunneljunction at an interface between the second n-type layer and the secondp-type layer, the device comprises a light emitting device outputtinglight having a power of at least 3 mW in response to a current densityof at least 10 A/cm²-flowing between the first metal contact and thesecond metal contact, and the current density of at least 5 A/cm² flowsin response to a voltage of less than 3.5 V applied across the devicebetween the first metal contact and the second metal contact.
 2. Themethod of claim 1, wherein the subsequent III-nitride material formslayers of III-nitride material and a magnesium (Mg) concentration in thelayers of the III-nitride material is suppressed through exposure to anacid or through flow modulation epitaxy.
 3. The method of claim 1,wherein the reactivating or the activating activates magnesium (Mg)through the lateral and vertical diffusion of hydrogen through thesidewalls and the top surface at an elevated temperature above 800degrees Celsius.
 4. The method of claim 1, wherein the first n-typelayer in the p-n junction and the active region are grown using theMOCVD, and the first p-type layer, the second p-type layer, and thetunnel junction are grown using the CVD.
 5. The method of claim 1,wherein the one or more lateral dimensions L are 5 micrometers<L≤50micrometers.
 6. The method of claim 1, wherein the activating or thereactivating through the top surface occurs through the openings thatexpose a surface of the second p-type layer comprising a p-type GaNlayer.
 7. The method of claim 6, wherein the first p-type layer and thesecond p-type layer comprise p-GaN and the openings are formed beforethe subsequent III-nitride material including the tunnel junction byfirst depositing a pattern of a dielectric on a surface of the firstp-GaN layer such that the subsequent III-nitride material occursselectively only on the exposed area of the first p-type layer.
 8. Themethod of claim 6, wherein a width of the openings is between about 0.1μm to about 100 μm wide and a spacing between each of the openings isabout 0.5 μm to about 400 μm.
 9. The method of claim 1, whereindelta-doping is used at a regrowth interface between the III-nitride p-njunction and the subsequent III-nitride material.
 10. The method ofclaim 9, wherein the delta doping comprises a pulsed delta n-type dopingscheme used at a regrowth interface of the subsequent III-nitridematerial with the p-n junction or for the entire growth of thesubsequent III-nitride material including the tunnel junction.
 11. Themethod of claim 10, wherein the pulsed delta n-type doping scheme isachieved by injecting a precursor containing n-type dopant for 40seconds or less per cycle and forms a continuous layer growth by keepingthe precursors comprising Group V and Group III precursorsuninterrupted.
 12. The method of claim 10, wherein the pulsed deltan-type doping scheme is achieved by injecting precursors containingn-type dopant and Group V/III materials for a period of time in cycles.13. A device, comprising: a mesa including: a III-nitride p-n junction,the p-n junction including an active region between a first p-type layerand a first n-type layer; and a III-nitride region patterned on theIII-nitride p-n junction, the III-nitride region including a secondn-type layer, a second p-type layer, and a tunnel junction formed at aninterface between the second n-type layer and the second p-type layer;an array of openings in the III-nitride region exposing the secondp-type layer on a top surface of the mesa; and wherein the mesa has oneor more lateral dimensions that are larger than 5 μm; and a first metalcontact to the first n-type layer and a second metal contact to thesecond n-type layer, wherein: the device comprises a light emittingdevice outputting light with a power of at least 3 mW in response to acurrent density of at least 10 A/cm² flowing between the first metalcontact and the second metal contact, and the current density of atleast 5 A/cm² flows in response to a voltage of less than 3.5 V appliedacross the device between the first metal contact and the second metalcontact.
 14. The device of claim 13, wherein the second n-type layercomprises a pulsed delta n-type doping scheme to realize an abrupt,smoother surface of the second-n-type layer and a higher carrierconcentration in the second n-type layer.
 15. The device of claim 13,further comprising a patterned dielectric on a top surface of the mesa,wherein the patterned dielectric comprises the openings exposing thesecond p-type layer.
 16. The device of claim 13, wherein the secondn-type layer comprises an n-type GaN layer having an n-type dopantconcentration of at least 1.1E20 cm⁻³.
 17. The device of claim 13,wherein the first p-type layer, the second p-type layer, the firstn-type layer, and the second n-type layer comprise GaN.
 18. The deviceof claim 13, wherein the interface has a surface roughness of 2.2 nm orless over an area of 5 micrometers by 5 micrometers.
 19. The device ofclaim 13, wherein the one or more lateral dimensions L are 5micrometers<L≤50 micrometers.
 20. The device of claim 13, wherein eachof the openings have a width W and 0.1 μm≤W≤100 μm.
 21. The device ofclaim 13, wherein a spacing S between the openings is 0.5 μm≤S≤400 μm.